After a number of years of slow work I have completed the design and manufacture of a size 2 TRAM that supports an INMOS transputer and memory.
The TRAM specification is as follows
- Size 2 TRAM format
- 4 Layer board, ground plane on second layer
- All through hole components (No Surface Mount)
- No PLD’s so no programming
- 1 Transputer socket supporting T4/T8xx devices
- ZIP20 memory supporting TC514400 (4Mb) or TC514256 (1Mb)
- Link speed jumper selectable 10/20Mbit/sec
- Transputer speed jumper selectable per the speeds supported by the selected device
Trick-1 